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Government Contracts
Computational Sensors Corp. has been awarded numerous Phase I and Phase II contracts supporting the continuous evolution of this important new technology.
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Active/Recent Contracts |
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Low-Cost Day/Night Imaging Sensors for Micro/Mini-Uninhabited Aerial Vehicles (UAVs)
During this Phase I program CSC simulated an analog-domain scene-based detector nonuniformity correction (NUC) processing and in particular, how it affects the compression and down link performance of the Raytheon LCMDL/RAFAR digital transmission unit. The realizable downlink throughput of the Raytheon LCMDL and/or RAFAR depends on the degree of compression, transmission range etc. as noted in the proposal. The simulation effort uses the Raytheon supplied Kakadu software which is equivalent to the processing performed in hardware on their digital down link units. The primary goal of this Phase 1 effort was to demonstrate the need for on-platform image processing in order to enable video frame rate down-link of surveillance video data for the SWIR and LWIR spectral bands. On-board processing must include NUC to pre-qualify the imagery and remove deleterious artifacts that would severely impact any on-board processing. The proposed method relies on analog domain processing within the detector FPA/ROIC prior to first digitization to implement the necessary processing for low power and poor lift capable surveillance platforms. Either analog or a digital downlink capability could then be applied for video transmission. Video processing in analog using raw detector signal is expected to be critically enabling to very small surveillance flight vehicles which are inherently power limited by allowing IR capable surveillance units to be fielded without heavy and power consuming temperature stabilization/compensation components, shuttering for calibration based NUC and/or back-end digital processing. |
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New Staring IR Architectural Readout Approach for Image Processing
Low power real-time processing of large area image sensor data is not computationally feasible using existing digital technology. This computational bottleneck is circumvented by using neuromorphic arrays in low-power analog vision processing systems. Computational Sensors Corporation (CSC) proposes to develop core enabling technologies that comprise a new massively parallel 3-D structure of highly integrated, multi-layered, programmable analog VLSI image processing architecture to meet navigation and guidance requirements in mobile platform applications, enabling the first new architectural approach to the readout of staring focal plane sensors since their invention in the early 1970's - continuous parallel processing without synchronous multiplexer operations. We propose to develop modular, wide dynamic range analog filter array layers for incorporation into multi-layered architectures using state-of-the-art micro-via vertical interconnect technology to seamlessly link unit cells of adjacent layers. This concept extends our previous work using Thin Film Analog Image Processors (TAIP) and CMOS analog image processors for spatio-temporal motion detection. The new architecture will provide continuous, non-multiplexed, computational capabilities that allow direct (no storage well) sampling of IR sensor irradiance. Full utilization of the sensor spectral dynamic range, improved signal to noise performance, and alias free operation will be possible as in biological systems. |
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Analog Image Processing Algorithms for Target Discrimination
During Phase II, Computational Sensors Corporation (CSC) proposes to enhance the discrimination algorithms developed under Phase I and implement them in the CSC analog spatio-temporal filtering system. The hardware will be used to accelerate searches and to perform HWIL parametric studies of target discrimination problems. During Phase I, CSC demonstrated successful discrimination using a wavelet best basis search algorithm where wavelet features were calculated via simulation and objects grouped by features using linear discrimination theory. Discrimination relies on computing multiple useful target features based upon known target characteristics. Discrimination improvements gained by calculating ever more specific features that rely heavily on a priori knowledge leads to over-training and an over- reliance on intelligence. Under a Phase II effort, CSC will evaluate a more general, complete set of features derived directly from a large wavelet filter bank using best basis search methods to reduce the reliance on a priori information to effect target discrimination. At the conclusion of Phase II, a method for designing optimal wavelet filter banks for target discrimination will have been developed, tested, and implemented in real-time hardware. System development suitable for interceptor integration is planned in Phase III. |
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Night Vision Capability for WASP MAV
The goal of this project is to provide the WASP platform with versatile night capability given the current power and weight constraints. The most significant issue of dynamic range management can be addressed using Computational Sensors Corp. existing spatio-temporal technology. This proposed solution is the result of intense studies by Computational Sensors Corp. to identify suitable detectors and vendors based on detector performance and phenomenology. This solution should give performance in the airglow regime through the highest night sky lighting conditions--and even daylight. The night airglow regime works rather well with the high gain SUI InGaAs camera, even without thermoelectric cooling at the expected high temperatures in Iraq. Under those conditions the read noise will still be the dominate contributor or at least equal to the shot noise. Additionally we believe that a 1.55um LED laser that takes almost no power and weight could add significantly to this regime even at the r2 ranges that would be expected from the operational use on WASP. In anything above that, the detection will be in a situation with a surplus of photons. |
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Sensor Fusion and Motion Energy Data Fusion for Target Classification and Discrimination
The goal of this Phase II effort is the continued algorithm development for accurate and efficient identification of closely-spaced-objects (CSOs) using analog spatial domain processors, primarily focusing on hardware design and validation. This includes the determination of whether a CSO condition exists, and to the extent possible, the extraction of spatial and/or temporal information that can be used to discriminate/identify targets. To decipher between CSO conditions, we use super resolution techniques to combine a sample of low-resolution images into one super resolved frame with sharper image quality. Phase I research focused on algorithm development to generate the best model for up-sampling and interpolating multiple low resolution frames to generate a single super resolved frame of stronger pixel resolution. Research continued in this Phase II effort to investigate algorithms to perform the necessary back-end deconvolution process and to isolate specific algorithms that are compatible with the application specific integrated circuit (ASIC) image processors available at CSC. Phase II efforts continue to generate a hardware implementation of the computationally expensive deconvolution algorithm to offer hybrid analog/digital board design of a computationally efficient deconvolution approach that will serve as a back-end solution to multiple up-front Super Resolution algorithm techniques. |
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Fly's Eye Image Processing for Air Surface Weapons
During Phase I, Computational Sensors Corporation (CSC) will develop and implement guidance algorithms inspired by insect visual systems. The common housefly has the ability to navigate complex environments while possessing only a tiny brain. Over the last ten years, substantial progress has been made in understanding the mechanisms of the fly visual system and applying this understanding to simple robotic systems. In this project, Computational Sensors Corporation (CSC) will leverage its previous experience in developing biomimetic systems for missile guidance inspired by the biology of the fly's visual system for an air-to-surface weapon. In previous work, CSC has developed an analog, massively parallel, real-time video processing system capable of bulk spatio-temporal filtering. The enabling device uses analog silicon retinas in multi-chip architectures for complex, agile, spatial-frequency filtering. This existing system hardware has been used to implement an Adelson-Bergen motion energy model that bears a formal relationship to the Reichardt model. During Phase I, CSC will investigate the design and use of this system in an insect inspired guidance system. In Phase II, the most promising algorithms will be implemented in our existing hardware for comprehensive testing. In addition, alternative advanced system architectures for implementing the algorithms will be investigated. Target analysis capabilities using nonlinear motion energy image processing techniques integrated in analog image processors are ideally suited for compact, low power, military imaging applications. The company's primary goal is to move this core technology into the military market with products using this technology initially being sold for missile defense applications. |
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Boost Phase Guidance and Control Using Motion Energy
During Phase I, Computational Sensors Corporation (CSC) will develop algorithms for estimating boost-phase target characteristics using motion energy analysis of the target plume. Boost phase intercepts have an extremely compressed time line. Guidance and control systems must react to target maneuvers swiftly and accurately. Current systems can only react to deviations from the target track after the target has maneuvered. In this project, CSC proposes using a motion energy analysis of the target plume to enhance guidance and control. Parts of the plume change during target maneuvers, before the target has had time to significantly deviate from its previous trajectory. By estimating target characteristics from the plume motion energy, there exists the potential for increasing the interceptor's responsiveness to maneuvers. CSC will develop new motion energy-based algorithms to detect target maneuvers and anticipate changes in the target track. A motion energy approach leverages the natural ability of existing massively parallel analog hardware to perform computationally intensive image processing tasks in real-time. Limited hardware-in-the-loop (HWIL) testing will be conducted throughout Phase I. In Phase II, we plan to fully implement the most promising algorithms and perform complete HWIL testing at missile system test beds, such as the KHILS facility. Target analysis capabilities using nonlinear motion energy image processing techniques integrated in analog image processors are ideally suited for compact, low power, military imaging applications. The company's primary goal is to move this core technology into the military market with products using this technology initially being sold for missile defense applications. |
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Multicolor VLWIR 3-D Stacked Integrated Focal Plane and Filtering Architectures
Building on Phase I results, Computational Sensor Corporation proposes a Phase-II Program to complete the design, fabrication and demonstration of the Multicolor Processor IC. This effort will include the assembly of electrically interconnected layers to produce a compact and computationally efficient Alternate Architecture implementation featuring three-dimensional stacking of ICs directly below a 2-dimensional detector array. Massively parallel operation is realized by integrating sensing and processing functions at the pixel level thereby relieving the severe data bottleneck found in conventional architectures attempting to satisfy large focal plane formats and emerging weapons system requirements. Present architectures multiplex the tens of thousands to millions of individual pixel signals into very few high-speed video lines prior to complex signal processing occurring after digitization. For example, typical infrared sensor formats now in production have output data rates around 6 MHz (60-Hz frame-rates). The next generation of multicolor arrays requires data rates reaching well into the gigahertz. Compact, low-power systems, especially requiring high dynamic range and high frame-rates, simply cannot handle the vast volume of raw data. The Alternate Architecture constitutes the first new imaging system approach since the invention of hybrid infrared focal-plane arrays in the 1970's by incorporating innovative bulk pre-processing at the pixel-level. |
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Motion Energy Approach to Missile Launch Detection for Aircraft
During Phase I, Computational Sensors Corporation (CSC) will develop improved methods for missile launch detection (MLD) for aircraft. Recent attacks on aircraft, both commercial and military, have demonstrated the need for reliable systems for detecting missiles at launch and during approach. Achieving high probabilities of detection with low probabilities of false alarm is a challenge, especially for small, dim targets in a cluttered background. One discriminating feature of a missile is its relative motion compared to the background. In this project, CSC proposes the development of a MLD system that discriminates missiles from their background using the Adelson-Bergen motion energy model. In previous work, CSC has demonstrated the ability of this bio-mimetic algorithm for detecting small moving targets for interceptor guidance applications. CSC has developed a massively parallel video processing system capable of bulk spatio-temporal filtering. The enabling device uses analog silicon retinas in multi-chip architectures for complex, spatial-frequency filtering allowing the real-time implementation of a motion-energy system. In the proposed work, CSC will investigate and develop the algorithm modifications necessary to apply the motion energy approach to aircraft MLD. In Phase II, CSC will implement the most promising algorithms in hardware for hardware-in-the-loop testing. |
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Analog Image Processing for Improved Hypertemporal ELDT SNR
During Phase I Computational Sensors Corp. (CSC) will develop spatial and temporal domain filtering approaches for improving the signal-to-noise-ratio (SNR) in high frame rate image data enabling all-weather hypertemporal ELDT techniques to robustly identify a missile launch in solar background scatter. The processing will be designed to discriminate between solar background scatter and missile plume signatures for high-altitude airborne and space based sensing platforms. The processing approaches to be explored will reflect a physical implementation where detector data is processed in the analog domain relying on pixel-to-pixel micro-via connectivity being developed through the DARPA VISA program. Performing signal processing prior to digitization improves the signal dynamic range and SNR through background subtraction. Boost-phase intercepts have an extremely compressed time line requiring fire control commit to be determined within the first minute following launch for an endo-atmospheric or low exo-atmospheric intercept. Current surveillance systems provide launch detection after the threat has breached the cloud layer. Hypertemporal approaches which exploit the high-frequency signature of missile plumes scattered through cloud layers has the potential to provide all weather early launch detection, and possibly, detection at ignition capability. Under a Phase II program, simulation and design would progress with production of a demonstration chip. |
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Spatio-Temporal Motion Energy Analysis of Missile Plumes
Computational Sensors Corporation (CSC) is exploring the application of spatio-temporal (S-T) motion energy approaches to missile plume video data. The work plan primarily focuses on determining what spatio-temporal characteristics of a missile plume can be detected using a motion-energy analysis. First, by examining highly controlled static mount missile motor firings followed by application to gradually more complex data sets. |
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Super Resolution Using Analog Spatial Processors
During Phase I Computational Sensors Corp. (CSC) will explore spatial domain super resolution (SR) approaches for extracting high resolution images from non-uniformly sampled data registered using sequences of low resolution images and seeker line-of-sight (LOS) direction estimates from an Inertial Measurement Unit (IMU). Interpolation, fundamental to SR, will be performed using the Gaussian blur kernel of our Thin Film Analog Image Processors (TAIP). In previous work, CSC has developed an analog, massively parallel, real-time video processing system capable of bulk spatio-temporal filtering. The enabling device uses analog silicon retinas in multi-chip architectures for complex, agile, spatial-frequency filtering. CSC plans to leverage the inherent computational advantage of performing large kernel spatial filtering in the analog domain to developing high frame-rate SR capability for mid-course seekers. One of the most difficult problems facing national missile defense pertains to accurately and efficiently identifying closely-spaced objects (CSO). For space-based detection systems, the situation can be highly complex with multiple objects moving at low relative velocities amid countermeasure clutter. Super resolution has the potential to enable earlier target/decoy discrimination for mid-course interceptors. During Phase I a SR approach will be developed with real-world data testing and implementation in hardware to commence in Phase II. |
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Analog Domain Spatio-Temporal Filtering for Background Subtraction in Hypertemporal Early Launch Detection
The overall objective of this project is to develop spatial and temporal filtering approaches for reducing daytime background and sensor clutter in support of early missile launch detection applications using the multiple chip spatial filtering capability of Computational Sensors Corp.'s (CSC) spatio-temporal filtering system. The current multi-chip implementation is a precursor to a next generation approach where multiple resistive grid spatial filtering layers and temporal filtering layers are stacked with per-pixel electrical interconnections to produce an all analog domain pre-processing section for arbitrary spectral band focal plane arrays. The final format of this new Alternate Architecture technology will have a form and interface capability allowing direct incorporation into existing imaging systems. |
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Hardware in the Loop Operational Testing for Analog VLSI Image Processor Design
CSC designed and manufactured the components of a first-generation analog image processing system. This system is capable of fast, bulk, spatio-temporal filtering of infrared sensor data and using the filtered data to compute localized estimates of motion. Both general spatio-temporal filtering and localized motion estimates are useful for detection and discrimination in missile defense applications. In Phase II, CSC proposes to manufacture an updated system. This system will be installed in a hardware-in-the-loop (HWIL) test bed at the Air Force Research Laboratory (AFRL) kinetic kill vehicle HWIL simulation (KHILS) facility. The system performance will be analyzed using representative missile defense intercept scenarios, with an emphasis on target detection, tracking, and discrimination. |
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Spatio-Temporal Interceptor Image Filtering for Threat Cloud RV/Clutter Discrimination
CSC proposes to continue developing mid-course threat cloud target identification and target/background clutter discrimination using spatio-temporal filtering motion analysis techniques initiated during Phase I. Our novel approach leverages the natural ability of massively parallel analog circuitry to perform important computationally intensive image processing tasks in real-time, and therefore has potential for handling intercept engagements containing numerous targets. During Phase I, CSC explored the applicability of analog spatio-temporal (S-T) filtering and scene motion analysis in a proof-of-concept demonstration applied to visible band data from a PENAID data acquisition program. Phase I results indicate potential for S-T filtering based target/clutter discrimination and tracking, and guides our Phase II approach to improving and tailoring the data association and tracking code applied during Phase I as well as the development of wavelet based discrimination. Hardware-in-the-loop testing and analysis using the existing Thin Film Analog Image Processor (TAIP) spatial filter in conjunction with temporal image processing will proceed throughout Phase II to validate our simulated results. |
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Analog VLSI Spatio-Temporal Seeker Image Data Filtering for Threat Cloud Discrimination
CSC proposes to continue developing the distant target identification capabilities of the non-linear spatio-temporal filtering motion-energy analysis techniques initiated during Phase I. The developed technique is based on cross-correlations over the focal-plane-array measured signal intensity exchange between pixels sampling distant targets. Work to be performed during Phase II includes both the extension of the analysis technique to more distant targets and the specific application to threat cloud RV/RV-decoy discrimination. Hardware-in-the-loop testing and analysis using the existing Thin Film Analog Image Processor (TAIP) spatial convolution engine is conjunction with our temporal image processing chips will proceed throughout Phase II to validate our simulated results. During Phase I, CSC explored the applicability of analog VLSI spatio-temporal filtering (STF) and pixel-on-target intensity modulation analysis of computed motion-energy to target identification based on measured pixel modulations due to radiometrically accurate, conical fixed range RV micro-dynamics. Our novel approach leverages the natural ability of massively parallel analog circuitry to perform important computationally intensive image processing tasks in real-time, and therefore has potential for handling intercept engagements containing numerous targets. Phase I results indicate potential for distant detected target object identification, and guides our threat cloud discrimination approach. |
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Continuous Wavelet Transform Seeker Engine for Accurate Target Recognition
In Phase II, CSC proposes to develop analog image processing technology utilizing the tunable Continuous Wavelet Transform (CWT) for the accurate recognition of midcourse and boost phase targets with specific application to accurate target identification. Hardware-in-the-loop testing and analysis using the existing TAIP spatial convolution engine in conjunction with our temporal image processing chips will proceed throughout Phase II to validate our simulated results. During Phase I, CSC explored the applicability of the CWT available using our analog spatio-temporal image filtering hardware and developed the necessary simulation capabilities to explore its utility and drive future hardware development. Our novel approach leverages the natural ability of massively parallel analog circuitry to perform important computationally intensive image processing tasks in real-time, and therefore has potential for handling real-time identification of incoming targets. During this proof-of-concept phase, a spatio-temporal motion-energy analysis technique was developed and applied to scene sets for the discrimination of subtle differences between incoming target types. Phase I results indicate that our CWT image filtering technology is applicable to both midcourse and boost phase target recognition. |
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Hardware Segmentation and Compression of Video Objects Using Thin Film Analog Image Processors
In Phase II, CSC proposes to investigate the potential computational gains and compression capabilities of two spatio-temporal approaches to video compression. First, a motion energy segmentation algorithm will be developed for an object-based compression scheme. Second, a multi-resolution approach will be investigated for a rate-scalable compression scheme. Both methods will be based on the hardware realization of CSC’s existing motion-energy image processing system using Thin Film Analog Image Processor (TAIP) spatial filtering chips in combination with temporal frequency band-pass filtering developed under DARPA/BMDO and SMDC funding. During Phase I, CSC investigated methods for performing block-based motion estimation using the TAIP spatial and temporal filtering chips. Block-based motion estimation is used by several existing video compression standards. Although it is possible to use the spatio-temporal architecture to do block-based motion estimation, the results showed that such an approach would not be practical or efficient. The proposed approaches take much better advantage of the strengths of the TAIP architecture and offer significant compression advantages. |
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